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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-13211-3E
General Purpose Linear IC's General Purpose Converters
CMOS
D/A Converter for Digital Tuning
(With Built-in OP Amp and I/O Expander)
MB88141
s DESCRIPTION
The FUJITSU MB88141 is a D/A converter with 12 built-in channels. The 12 analog output channels have built-in OP Amps, providing large current drive capability. Data input is compatible with I2C specifications, and is controlled by two control lines. The built-in I/O expander function allows the MB88141 to be controlled by devices incompatible with I2C bus specifications (provides conversion between I2C serial and 8- or 4-bit parallel I/O). Can be adapted for tuning by electronically variable or pre-fixed resistance, etc.
s FEATURES
* * * * * Ultra-low power consumption (0.9 mW/channel Typ.) Ultra-compact package Built-in 12-channel R-2R type 8-bit D/A converter Built-in analog output amplifier (maximum sink current 1.0 mA, maximum source current 1.0 mA) Analog output range 0 V to VCC
(Continued)
s PACKAGES
24-pin plastic DIP 24-pin plastic SOP 24-pin plastic SSOP
(DIP-24P-M02)
(FPT-24P-M01)
(FPT-24P-M03)
"Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips."
MB88141
(Continued) * 5 V single power supply * Power supply/GND for MCU interface and OP Amp is separate from power supply/GND for D/A converter * Power supply for D/A converter is divided into two systems for VDD1/VSS1 (AO1 to AO4) and VDD2/VSS2 (AO5 to AO12), allowing separate level settings for each system * Compatible with serial data input, I2C specifications * Built-in I/O expander function (converts between I2C serial and 8- or 4-bit parallel) * CMOS process * Packages: DIP 24-pin, SOP 24-pin, SSOP 24-pin
2
MB88141
s PIN ASSIGNMENT
(TOP VIEW)
AO1 AO2 AO3 AO4 D7/AO5 D6/AO6 D5/AO7 D4/AO8 D3/AO9 D2/AO10 D1/AO 11 D0/AO12
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
GND VSS1 VDD1 SDA SCL MOD CS2 CS1 CS0 VDD2 VSS2 VCC
(DIP-24P-M02) (FPT-24P-M01) (FPT-24P-M03)
3
MB88141
s PIN DESCRIPTIONS
Pin no. 21 20 19 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 24 22 23 15 14 Symbol SDA SCL MOD CS0 CS1 CS2 AO1 AO2 AO3 AO4 D7/AO5 D6/AO6 D5/AO7 D4/AO8 D3/AO9 D2/AO10 D1/AO11 D0/AO12 VCC GND VDD1 VSS1 VDD2 VSS2 I/O BUS I I Description I2C bus data input/output pin (hysteresis input). *2 Outputs the acknowledge signal. I2C bus shift clock input pin (hysteresis input). *2 D/A converter and I/O expander mode switching pin. *1, *3 Input "L" to operate as a D/A converter, "H" to operate as I/O expander and D/A converter. Lower 3 bits of the slave address setting pins. *1 This allows up to eight MB88141 chips to be used on the same bus line.
I
O
8-bit D/A output with OP Amp. *3
I/O
8-bit D/A output with OP Amp. *3 In I/O expander operation, these pins function as parallel data input/output pins.

Power supply pin for digital circuits and OP Amp. GND pin for digital circuits and OP Amp. Reference power supply pin for D/A converter (H). AO1 to AO4. Reference power supply pin for D/A converter (L). AO1 to AO4. Reference power supply pin for D/A converter (H). AO5 to AO12. Reference power supply pin for D/A converter (L). AO5 to AO12.
*1: The MOD and CS0-CS2 pins should be used with fixed level input. *2: Use particular caution in handling the SDA and SCL pins. These pins have no transistor protection against VCC voltage and therefore have weaker anti-static characteristics than other pins. *3: When using the I/O expander function together with the D/A converter function, take care that D/A converter output precision is within a range that will not affect overall system operation.
4
MB88141
s BLOCK DIAGRAM
SDA SCL CS2 CS1 CS0 MOD
I2C Bus Interface D/A & I/O Control Logic
D0 8-bit latch 1 ch
D7
D0 8-bit latch 4 ch
D7
D0 8-bit latch 5 ch
D7
D0 8-bit latch 12 ch
D7
VDD1 VSS1
R-2R ladder circuit
R-2R ladder circuit
R-2R ladder circuit
R-2R ladder circuit
VDD2 VSS2
-
+
-
+
-
+
-
+
8 VCC GND
AO1
AO4
AO5/D7
AO12/D0
5
MB88141
s DATA CONFIGURATION
The MB88141 data configuration differs in each of the two operating modes (D/A converter (12-channel) and I/O expander plus D/A converter), selected by the MOD pin signal.
1. For D/A Converter (12-channel) Operation (MOD = "L")
(1) I2C Bus Format
First S S6 S0 R/W 0 A C7 C0 A D7 D/A data (8 bits) D0 A Last P Slave address (7 bits) Channel selection (8 bits)
: Sent from master device S: "Start" condition
: Sent from MB88141 (slave device) A: "Acknowledge" output
P: "Stop" condition
(2) Slave Address Comparison (7 bits) Slave address input (7 bits) S6 1 1 1 1 1 1 1 1 S5 0 0 0 0 0 0 0 0 S4 0 0 0 0 0 0 0 0 S3 1 1 1 1 1 1 1 1 S2 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 = = = = = = = = 1 1 1 1 1 1 1 1
Internally fixed 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Externally set 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1
CS6 CS5 CS4 CS3 CS2 CS1 CS0
Address comparison: Operates only for devices whose own slave address (internally fixed CS6 to CS3 and externally set CS2 to CS0) matches the slave address input value. (3) R/W Selection (1 bit) Fixed at "0" (the D/A converter performs write operations only).
6
MB88141
(4) Channel Selection (8 bit) C7 C6 C5 C4 C3 C2 x x x x x x x x x x x x x x x x x x x x x x x x 0 0 1 1 1 1 0 0 1 1 1 1
C1 0 0 0 0 1 1
C0 0 1 0 1 0 1
Channel select All channels selected *1 AO1 selected AO12 selected Don't care Don't care All channels selected *2
x: Don't care *1: The 1 byte of data following the channel selection is set on all channels (all channels set to the same data value).
S Slave address (7 bits) 0 A XXXX0000 A D/A data (8 bits) A P
*2: The 12 bytes of data following the channel selection are set on all channels (all channels set to separate data values).
S Slave address 0 A XXXX1111 A AO1 data A *** AO12 data A P
: Sent from master device S: "Start" condition
: Sent from MB88141 (slave device) A: "Acknowledge" output
P: "Stop" condition
Note: Setting will repeat, continuing in order from ch1, until the start and stop conditions are acknowledged. (5) D/A Data (8 bits) D7 D6 D5 D4 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1
D3 0 0 0 1 1
D2 0 0 0 1 1
D1 0 0 1 1 1
D0 0 1 0 0 1
Channel select VSS (VREF / 256) x 1 + VSS (VREF / 256) x 2 + VSS (VREF / 256) x 254 + VSS (VREF / 256) x 255 + VSS
Note: VREF = VDD - VSS
7
MB88141
2. For D/A Converter + I/O Expander Operation (MOD = "H")
(1) I2C Bus Format
First S First S S6 S0 R/W 1 A D7 D0 A Last P D7 A D0 Digital data (8 bits) A Last P Slave address (7 bits) S6 Digital data (8 bits) C7 A C0
S0 R/W 0
Slave address (7 bits)
Channel selection (8 bits)
: Sent from master device S: "Start" condition
: Sent from MB88141 (slave device) A: "Acknowledge" output
P: "Stop" condition
(2) Slave Address Comparison (7 bits) Slave address comparison is the same as for D/A converter (12-channel) operation (see "1. (2) "Slave Address Comparison"), with the exception that the CS2 setting determines the number of D/A converter channels and the number of I/O expander bits. CS2 D/A converter I/O expander 0 1 4 channels (AO1 to AO4) 8 channels (AO1 to AO8) 8 bits (D7 to D0) 4 bits (D3 to D0)
When CS2 = "1" is selected, the upper 4 bits (D7 to D4) of write operations (I2C bus to parallel interface) are ignored, and the upper 4 bits or read operations (parallel interface to I2C bus) are output at "0" (low). (3) R/W Selection (1 bit) R/W 0 1
I/O expander operation I2C bus input parallel data output Parallel data input I2C bus output
D/A converter operation I2C bus input analog output
8
MB88141
(4) Channel Selection (8 bits) C7 C6 C5 C4 C3 C2 x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1
C1 0 0 0 0 0 0 1 1
C0 0 1 0 1 0 1 0 1
Channel select I/O expander operation AO1 selected AO4 selected Don't care (AO5 selected) Don't care (AO8 selected) Don't care Don't care I/O expander continuous operation
( ): When using D/A converter 8 channel, I/O expander 4 bit operation. x: Don't care (5) D/A Data (8 bits) Same as "1. (5) D/A Data (8 bits)." (6) I/O Expander Continuous Operation I2C bus input parallel data output
S Slave address 0 A XXXX1111 A Digital data A *** Digital data A P
Note: In continuous operation, operation continues until start and stop conditions are acknowledged. Parallel data input I 2C bus output
S Slave address 1 A Digital data A Digital data A *** Digital data A P
: Sent from master device S: "Start" condition
: Sent from MB88141 (slave device) A: "Acknowledge" output
P: "Stop" condition
9
MB88141
s TIMING CHART (I2C BUS SPECIFICATIONS)
"Start" condition Data change S6 S5 S4 S3 S2 S1 "Acknowledge" response S0 R/W ACK C7 C6 C5 "Acknowledge" response C0 ACK D7 D6 "Acknowledge" "Stop" response condition D0 ACK
SDA input SCL input AO1 to AO12 D0 to D7 output D0 to D7 input SDA output
1
2
3
4
5
6
7
8
9
10
11
12
17
18
19
20
26
27
Delay Analog output Delay HiZ state Load data HiZ input DX "Acknowledge" response HiZ state D7 D6 D5 D0 D7 D6 D0 D7 Load data Digital input
Note: * The SDA input acknowledge response (ACK) is an output signal from the MB88141. * The D0-D7 input and output timing represent the timing of switching to write and read operations respectively. Also, D0-D7 input remains in HiZ state between the end of a read operation and the acknowledgment of the next I/O write signal.
s ANALOG OUTPUT VOLTAGE RANGE
R-2R ladder circuit VDD1 & VDD2
Operating amp circuit VCC ( = VDD1, VDD2)
Analog output range
VSS1 & VSS2
GND ( = VSS1, VSS2)
10
MB88141
s ABSOLUTE MAXIMUM RATINGS
Parameter Symbol VCC Supply voltage Input voltage Output voltage Power consumption Operating temperature Storage temperature VDD VSS VIN VOUT PD Ta Tstg With reference to GND, at Ta = +25 C Conditions Rating Min. -0.3 -0.3 -0.3 -0.3 -0.3 -20 -55 Max. +7.0* +7.0* +7.0* VCC + 0.3 VCC + 0.3 250 +85 +120 Unit V V V V V mW C C
*: VCC VDD1 VSS1, VCC VDD2 VSS2 WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s RECOMMENDED OPERATING CONDITIONS
Parameter Supply voltage 1 Supply voltage 2 Supply voltage 3 Analog output current Oscillator limit output capacitance Digital data setting range Operating temperature Symbol VCC GND VDD1 VSS1 VDD2 VSS2 IAL IAH COL Ta Conditions VCC VDD1 > VSS1 VDD1 - VSS1 2.0 V VCC VDD2 > VSS2 VDD2 - VSS2 2.0 V Source current Sink current Value Min. 4.5 2.0 0 2.0 0 0 0 #00 -20 Typ. 5.0 0 Max. 5.5 VCC 3.5 VCC 3.5 1.0 1.0 1.0 #FF +85 Unit V V V V V V mA mA F C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
11
MB88141
s ELECTRICAL CHARACTERISTICS
1. DC Characteristics
(1) Digital Circuits (VCC = 5 V 10%, GND = 0 V, Ta = -20 C to +85 C) Symbol VCC ICC IILK VIL VIH VHYS VOH VOL1 "L" level output voltage VOL2 VOL3 (2) Analog Circuits 1 VCC SDA, SCL, CS0, CS1, CS2, MOD, D0 to D7 SDA, SCL D0 to D7 SDA Pin name Conditions SCL = 400 kHz, no load VIN = 0 to VCC IOH = -400 A IOL = 2.5 mA IOL = 3.0 mA IOL = 6.0 mA Value Min. 4.5 -10 0 0.7 VCC 0.05 VCC VCC - 0.4 Typ. 5.0 1.0 Max. 5.5 3.7 +10 0.3 VCC VCC 0.4 0.4 0.6 Unit V mA A V V V V V V V
Parameter Supply voltage Supply current Input leak current "L" level input voltage "H" level input voltage Input hysteresis width "H" level output voltage
(VCC = 5 V 10%, GND = 0 V, Ta = -20 C to +85 C) Symbol Pin name IDD VDD VDD1, VDD2 VSS1, VSS2 Conditions No load IDD = IDD1 + IDD2 VDD1 - VSS1 2.0 V VDD2 - VSS2 2.0 V Value Min. 2.0 GND AO1 to AO12 No load VDD1, VDD2 VCC - 0.1 V VSS1, VSS2 0.1 V -1.5 -1.0 Typ. 1.2 8 8 Max. 2.5 VCC 3.5 +1.5 +1.0 Unit mA V V bit bit LSB LSB
Parameter Current consumption
Analog voltage Resolution Monotonic increase Non-linearity error Differential linearity error
VSS Res Rem LE DLE
12
MB88141
Non-linearity error: Error in the input/output curve with respect to a straight line connecting output voltage at "00" and output voltage at "FF" levels. Differential linearity error: Deviation from ideal voltage with respect to a 1-bit increase in digital value.
Analog output Ideal linearity VAOH
Non-linearity error VAOL #00 #FF
Digital setting
Note: VAOH and VDD, as well as VAOL and VSS are not necessarily the same values.
(3) Analog Circuits 2
(VCC = VDD1 = VDD2 = 5.0 V, GND = VSS1 = VSS2 = 0.0 V, Ta = -20 C to +85 C)
Symbol Pin name
Parameter Output minimum voltage 1 Output minimum voltage 2 Output minimum voltage 3 Output minimum voltage 4 Output minimum voltage 5 Output maximum voltage 1 Output maximum voltage 2 Output maximum voltage 3 Output maximum voltage 4 Output maximum voltage 5
Conditions IAL = 0 A IAL = 500 A
Value Min. VSS Typ. VSS VSS VDD VDD Max. VSS + 0.1 VSS + 0.2 VSS + 0.2 VSS + 0.3 VSS + 0.3 VDD VDD VDD + 0.2 VDD VDD + 0.3
Unit V V V V V V V V V V
VAOL1 VAOL2 VAOL3 VAOL4 VAOL5 VAOH1 VAOH2 VAOH3 VAOH4 VAOH5 AO1 to AO12
VSS - 0.2 Digital data IAH = 500 A VSS "00" IAL = 1.0 mA VSS - 0.3 IAH = 1.0 mA IAL = 0 A IAL = 500 A VSS VDD - 0.1
VDD - 0.2 Digital data IAH = 500 A VDD - 0.2 "FF" IAL = 1.0 mA VDD - 0.3 IAH = 1.0 mA VDD - 0.3
13
MB88141
2. AC Characteristics
Value Parameter SCL clock frequency Bus free time between "stop" condition and "start" condition Hold time (resend) "start" condition. The first clock pulse is generated after this interval. SCL clock low hold time SCL clock high hold time Resend "start" condition setup time Data hold time Data setup time SDA and SCL signal fall time SDA and SCL signal rise time "Stop" condition setup time Pulse width of spike suppressed by input filter Output fall time when Sink current 3 mA bus capacitance is between 10 pF and Sink current 6 mA 400 pF I2C bus line capacitance load D/A Analog output settling time Digital output delay time Input open time I/O expander Digital input setup time Digital input hold time *1: Load condition 1
Measurement point DUT RAL = 10 k CAL = 50 pF DUT CAL = 50 pF
ConSymbol dition fSCL tBUF tOF *1 *2 *3
Standard mode Min. 0 4.7 Max. 100 1000 300 250 400 100 300
High speed mode Min. 0 1.3 Max. 400 0.9 300 300 50 250 250 400 100 300
Unit kHz s s s s s s ns ns ns s ns ns ns pF s ns ns ns s
tHD ; STA tLOW tHIGH tSU ; STA tHD ; DAT tSU ; DAT tR tF tSU ; STO tSP
4.0 4.7 4.0 4.7 0 250 4.0 200 250 0.9
0.6 1.3 0.6 0.6 0 100 20 + 0.1 Cb 20 + 0.1 Cb 0.6 0 20 + 0.1 Cb 20 + 0.1 Cb 200 100 0.9
Cb tDL ; AO tDL ; DO tDZ ; DI tSU ; DI tHD ; DI
*2: Load condition 2
Measurement point
*3: The I/O expander input open time value applies to read operation following an I/O write operation, or to an I/O write operation following a read operation.
14
MB88141
* Input/output Timing
tBUF tHD; STA
** ** **
SDA
**
Acknowl edge
**
Acknowl edge tSP 18
**
**
SCL
P S tLOW tHIGH
tSU; DAT
**
tHD; DAT
**
tSU; STA
tHD; STA
9 tR tDZ; DI tSU; DI tF tHD; DI Digital input tDZ; DI
Sr
**
**
P
tSU; STO
D0 to D7
tDL; DO Digital output tDL; AO
D0 to D7
Digital input
AO1 to AO12
90% 10%
Analog output
Note: The discrimination levels are 70% and 30% of VCC.
15
MB88141
s ORDERING INFORMATION
Part number MB88141P MB88141PF MB88141PFV Package 24-pin plastic DIP (DIP-24P-M02) 24-pin plastic SOP (FPT-24P-M01) 24-pin plastic SSOP (FPT-24P-M03) Remarks
16
MB88141
s PACKAGE DIMENSIONS
24-pin plastic DIP (DIP-24P-M02)
30.20 -0.30 1.189 -.012
+0.20 +.008
INDEX-1 13.550.25 (.533.010)
INDEX-2
0.51(.020)MIN
4.96(.195) MAX
3.00(.118) MIN 0.98 -0 1.27(.050) MAX
C
+0.50 +.020
0.250.05 (.010.002) 1.50 -0 .059 -0
+0.50
.039 -0
+.020
0.450.08 (.018.003)
2.54(.100) TYP
15.24(.600) TYP
15MAX
1994 FUJITSU LIMITED D24015S-2C-3
Dimensions in mm (inches)
(Continued)
17
MB88141
(Continued) 24-pin plastic SOP (FPT-24P-M01)
2.25(.089)MAX (Mounting height) 0.05(.002)MIN (STAND OFF)
15.24 -0.20 .600 -.008
+0.25
+.010
INDEX
5.300.30 (.209.012)
7.800.40 (.307.016)
6.80 -0.20 .268 -.008
+0.40 +.016
1.27(.050) TYP
0.450.10 (.018.004)
O0.13(.005)
M
0.15 -0.02 .006 -.001 Details of "A" part
+0.05 +.002
0.500.20 (.020.008)
0.20(.008)
"A" 0.10(.004) 13.97(.550)REF
0.50(.020) 0.18(.007)MAX 0.68(.027)MAX
C
2000 FUJITSU LIMITED F24007S-3C-5
Dimensions in mm (inches) (Continued)
18
MB88141
(Continued) 24-pin plastic SSOP (FPT-24P-M03)
* 7.750.10(.305.004)
Note) * marked dimensions do not include resin residues.
+0.20 +.008
1.25 -0.10 .049 -.004
(Mounting height)
0.10(.004)
* 5.600.10
INDEX (.220.004)
7.600.20 (.299.008)
6.60(.260) NOM
0.650.12(.0256.0047)
0.22 -0.05 .009
+0.10 +.004 -.002
"A"
0.15 -0.02 .006 -.001
+0.05 +.002
Details of "A" part 0.100.10(.004.004) (STAND OFF)
7.15(.281)REF
0
10
0.500.20 (.020.008)
C
2000 FUJITSU LIMITED F24018S-2C-3
Dimensions in mm (inches)
19
MB88141
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0101 (c) FUJITSU LIMITED Printed in Japan

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